The complex interplay of dielectric substrate properties, semiconducting film growth, crystal structure, texture, and charge carrier transport is investigated for the case of tetracene films deposited on different dielectrics (polystyrene, parylene C, polymethylmethacrylate, hexamethyldisilazane-treated SiO2, and untreated SiO2). The tetracene hole mobility, measured in the bottom-gate organic thin film transistor (OTFT) configuration, varies over more than one order of magnitude depending upon the dielectric layer used. Atomic force microscopy and synchrotron grazing incidence X-ray diffraction measurements, analyzed with the extended Rietveld method, were used to investigate the influence of film connectivity, crystalline phase, polymorphism, and texture on charge transport. The role of the surface polarity and the processing conditions of the gate dielectric layer are also discussed. Based on our results, we propose guidelines for the selection of a gate dielectric material favorable for charge transport in tetracene films.
