The effects of electrical leakage and capacitance density were investigated in the low-voltage operated organic field-effect transistors (OFETs) by using a gate dielectric with a bi-layer structure of atomic layer deposited alumina (ALD-Al₂O₃) and high-k polymeric cyanoethylated pullulan (CEP) layer. A significant improvement in the device performance was achieved by compromising the two effects, suppressing the leakage current with ALD-Al₂O₃ dielectric and maintaining the high capacitance with high-k polymeric layer. With the optimized thickness of ∼5 nm alumina (C_i,CEP/Al2O₃ ∼ 85 nF cm⁻²), a high mobility of ∼5 cm² V⁻¹s⁻¹ and sharp subthreshold slope (SS) of 0.066 V dec⁻¹ were obtained. The smoother surface of the polymeric dielectric surface enhanced the 2-dimensional vertical molecular layer growth and contributed to the better device performance.