The quantum-dot cellular automata (QCA) present great promising advantages for emerging nano logic circuits. However, feedback design in QCA sequential circuit is often a big problem. Especially in line feedback shift registers (LFSR), each feedback loop consists of at least a modulo-2 adder and a trigger unit, which is hard to implement using the conventional methods. Given the importance of LFSR in communication systems, a design methodology with QCA is proposed in this work. At first, a new structure is presented to be used in every single feedback LFSR since it can make the feedback loop consume only one clock cycle of delay. Subsequently, quantitative criteria are presented to judge whether any multi-feedback LFSR can be directly designed using the proposed structure. LFSR that cannot satisfy the criteria are supposed to be transformed to their equivalent forms. We verify any LFSR can be transformed to the type of single feedback, according to the theorem of searching the monic and irreducible polynomials over Galois field GF (2). The step-by-step method of transforming multi-feedback into single feedback is given on the consideration of all kinds of cases. Further, two other simple transforming methods are presented to cope with the exponential growth of clock delay in the multi-to-single transforming method. The most remarkable advantage of this series of methods is to keep from introducing undesired bits into the payload data flowing in the sequential circuits.

Regardless of the technology, additive or subtractive, the miniaturization trend is constantly pushing for smaller resolutions. The rise of global challenges in material availability, fabrication in three dimensions (3D), design flexibility and rapid prototyping have pushed additive manufacturing (AM) into the spotlight. Addressing the miniaturization trend, AM has already successfully answered the challenges for microscale 3D fabrication. However, fabricating nano-resolution still presents a challenge. In this review, we will present some of the most reported AM-based technologies capable of nanoscale 3D fabrication addressing resolutions of ≤ 500 nm. The focus is placed on Electrohydrodynamic (EHD) printing (also known as e-jet printing), as EHD printing seems to have the best trade-off when it comes to technique complexity, achievable resolutions, material diversity and potential to scale-up throughput. An overview of the smallest achieved resolutions as well as the most unique use cases and demonstrated applications will be addressed in this work.

We report on optical and electrical properties of amorphous In-Ga-Mg-O (a-IGMO) films and characteristics of a-IGMO channel thin-film transistors which went through the reductive post-annealing process. Optical band-gap energies of a-IGMO films were larger than that of amorphous In-Ga-Zn-O (a-IGZO) films. Carrier density and Hall mobility of a-IGMO films with the reductive post-annealing were almost the same degree as those of a-IGZO films. Although the reductive annealing with the SiN x underlayer makes an a-IGZO film degenerate semiconductor and its TFT inoperative, a-IGMO TFTs successfully operated after this reductive process. Break-junction tunnelling spectroscopy which was applicable not to a-IGMO but to a-IGZO with the reductive process showed a noticeable density of state character in the vicinity of the Fermi level for a-IGZO, which is consistent with its property.

The present work explores the theoretical analysis of copper passivated MgONRs (Cu-MgO-Cu) for possible nanointerconnect applications. The first principles calculations based on density functional theory (DFT) and non-equilibrium Green's function are employed for theoretical investigation. Pristine MgONRs (H-MgO-H) and Cu-MgO-Cu are both thermodynamically stable and are metallic with H-MgO-H being relatively more stable. Further, the I-V characteristics evaluated using the two-probe method reveal the ohmic behavior of Cu-MgO-Cu. The Cu-MgO-Cu device is further investigated for the nanointerconnect applications. The computed nanoscale parasitic components such as quantum resistance ( $R_{Q}$ ), quantum capacitance ( $C_{Q}$ ), and kinetic inductance ( $L_{K}$ ) are computed to be 6.46 k $\Omega$ , 5.57 fF/ $\mu\text{m}$ , and 58.17 nF/ $\mu$ m, respectively. Furthermore, the delay and power delay product (PDP) of the nanointerconnect are explored which are important attributes of nanointerconnects. The findings suggest the Cu-MgO-Cu nanoribbons with low parasitic parameters can potentially be employed for nanointerconnect applications.

We examine the question “Can Dirac materials exist in a nondegenerate statistical state?,” deriving and employing an identity for the thermodynamic Grand Potential $\Omega$ (per unit volume/area) in the low density nondegenerate statistical regime, relating it to the density $n$ as $\Omega = -\beta ^{-1} n$ ( $\beta ^{-1} = \kappa _{B} T$ is thermal energy, $\kappa _{B}$ is the Boltzmann constant, and $T$ is Kelvin temperature). The implications of this identity for Dirac materials are explored. The identity is universally valid for all thermodynamic systems in equilibrium in the nondegenerate, low density statistical regime, irrespective of size, dimensionality or applied static fields. Phenomena that may contribute to the realization of such a nondegenerate statistical equilibrium state in Dirac materials are discussed.

In the era of advanced nanotechnology where billions of transistors are fabricated in a single chip, high-speed operations are challenging due to packaging related issues. In High-Speed Very Large Scale Integration (VLSI) systems, decoupling capacitors are essentially used in power delivery networks to reduce power supply noise and to maintain a low impedance of the power delivery networks. In this paper, the cumulative impedance of a power delivery network is reduced below the target impedance by using state-of-the-art metaheuristic algorithms to choose and place decoupling capacitors optimally. A Matrix-based Evolutionary Computing (MEC) approach is used for efficient usage of metaheuristic algorithms. Two case studies are presented on a practical system to demonstrate the proposed approach. A comparative analysis of the performance of state-of-the-art metaheuristics is presented with the insights of practical implementation. The consistency of results in both the case studies confirms the validity of the proposed appraoch.

Developments in plasma process technology have led to innovative advances in the miniaturization and integration of semiconductor devices. However, when semiconductor devices are utilized in the nanoscale domain, defects or damage related to charged particles and ultraviolet (UV) rays emitted from the plasma can emerge, resulting in degraded characteristics for nano-devices. It is thus imperative to come up with a method that suppresses or controls the charge accumulation and ultraviolet (UV) damage in plasma processing. This paper reviews our work on a neutral beam process that suppresses the formation of defects at the atomic layer level on the processed surface, which makes it possible for ideal surface chemical reactions to occur at room temperature. This is vital for the creation of innovative nano-devices in the future.

Embedded-chip planar silver-elastomer interconnect technology is developed with flexible substrates and demonstrated for on-skin biophotonic sensor applications. This approach has several benefits and is also consistent with chip-thinning where the chip thickness is 100 microns and less. The key benefits from this approach arise because both the bottom and top sides are now available as flat surfaces for 3D integration of other components. It also results in the lowest electrical parasitics compared to flipchip with adhesives or printed-ramp interconnections with surface-assembled devices. Embedding of chips in flexible carriers was accomplished with direct screen-printed interconnects onto the chip pads in substrate cavities. Silver nanoflake-loaded polyurethane is utilized in the embedded-chip packages to provide the desired lower interconnect resistance and also reliability in flexible packages under deformed configurations. Viscoelastic models were utilized to model the interconnection stresses. Planar interconnects in flexible substrates are developed with conductive silver-loaded elastomer interconnects. This approach is compared to direct chip-on-flex assembly technology for reliability under bending and high-temperature storage. The embedded-chip technology is demonstrated through biophotonic sensor applications where light sources (LEDs) and photodetectors are embedded inside the package. Functional validation in bent configuration at low curvatures is shown by measuring pulse rate and muscle activity with human subjects. By extending this technology to nanowires in elastomers, further enhancement in electrical and reliability performance can be achieved.

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In recent years, the aggressive downscaling of electronic components has led to highly dense and power-hungry devices. With Moore’s law expected to soon reach its physical limit, there is a pressing need to significantly improve the efficiency and performance not only of nanodevices, but also of the embedding environment in which such nanodevices are integrated. In this context, key for improving the performance and for reducing both system cost and size is electronics packaging. However, electronics packaging at the nanoscale (i.e., nanopackaging) is currently facing several technological challenges, as in such scale conventional materials present intrinsic physical limitations. To address this, it becomes necessary to replace these latter with novel alternatives, such as low-dimensional carbon-based nanomaterials. Carbon nanotubes (CNTs) and graphene (materials with 1D and 2D dimensionality, respectively) have the potential to be successfully integrated into traditional silicon-based electronics as well as with beyond-silicon electronics, and their unique electrical, thermal, mechanical, and optical properties could be key enablers for significant performance improvements. In this short review we describe why these nanomaterials are very promising for electronics nanopackaging, and we outline the key application areas, mainly interconnects, thermal management, and flexible devices.

We provide a summary of the fundamentals of thermal management, outline the state-of-the-art in the field of thermal interface materials, and describe recent developments in graphene-based non-curing and curing composites used for thermal management. The discovery of unique heat conduction properties of graphene and few-layer graphene motivated research activities worldwide focused on creating efficient graphene-based thermal interface materials. While the initial focus of these studies was on obtaining the maximum possible thermal conductivity of the composites, recently the attention has shifted to practical problems of minimizing the thermal contact resistance at interfaces, optimizing the size distribution of graphene as filler, and addressing the issues of scalability, stability, and production costs at commercial scales. We conclude the review with a general outlook for commercial applications of graphene in the thermal management of electronics.

Organic electrochemical transistors (OECTs), as one of the most promising sensing techniques, have shown various advantages compared to traditional means, which include ultra-high sensitivity, low driving voltage, and excellent biocompatibility for different bioelectrical and biochemical sensing. Moreover, to fully unleash the potential of OECT sensors, integrated sensing systems, especially OECT-based sensing arrays, are widely investigated due to spatiotemporal resolution, mechanical flexibility, high optical transparency, low power dissipation, and ease of fabrication. These advantages are attributed to the unique working mechanism of OECT, novel mixed ionic-electronic (semi)conductors, adaptable device geometry/structure, etc. In this review, advances in OECT-based sensing systems are systematically summarized, with a focus on the OECT-based sensing array. Furthermore, perspectives, concerning stability, cut-off frequency, integrating density, and power dissipation, are discussed based on recent studies on OECTs and their relevant sensor arrays. Last, a summary and an outlook of this field are provided.

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The sub-threshold regime is suited for applications requiring ultra-low power consumption with low to medium frequency (tens to hundreds of MHz) of operation. Therefore, this paper presents electrical modeling and comprehensive analysis of copper-carbon nanotube (Cu-CNT) composite interconnects for sub-threshold circuit design. At lower operating frequencies, the effective complex conductivity of Cu-CNT composites in the nanoscale is formulated by developing an analytical model. Based on the proposed equivalent single conductor model, the frequency-dependent resistance and inductance of composite interconnects are computed. Finally, the sub-threshold crosstalk effect, transfer gain, and Nyquist stability of coupled Cu-CNT composite interconnect are analyzed using ABCD matrix approach.

Field-effect gas sensors, integrating the gas sensor and amplification transistor, exhibit excellent sensory performance. Here we report organic thin-film transistors (OTFTs) with nanofiber-textured semiconductor films that exhibit superior ammonia response compared to conventional OTFTs with uniform/flat semiconductor films. The introduce of insulating polymer additives (IPAs) facilitates the formation of semiconducting nanofiber during coating. The effects of IPAs, organic semiconductor/IPA blend ratios and solvents on OTFT-based sensory performance are studied. The results show that the use of SU8 as IPA and chloroform as solvent form intertwined semiconductor nanofibers (∼50 nm in diameter) at the bottom. The resulting OTFTs exhibit extraordinarily high sensitivities to ammonia, which reach 13676%/ppm (current) and 457%/ppm (turn-on voltage), respectively. Finite element analysis is conducted to simulate the adsorption/desorption processes of gas molecules and the effect of specific surface area on sensory performance.

The phonon transport in the lateral direction for gap-controlled Si nanopillar (NP) /SiGe interlayer composite materials was investigated to eliminate heat generation in the channel area for advanced MOS transistors. The gap-controlled Si NP/SiGe composite layer showed 1/250 times lower thermal conductivity than Si bulk. Then, the phonon transport behavior in lateral direction could be predicted by the combination between the 3-omega measurement method for thermal conductivity and the Landauer approach for phonon transport in Si NP/Si 0.7 Ge 0.3 interlayer composite structure. We found that the NP structure could regulate the phonon transport in the lateral direction by changing the NP gaps by preventing the phonon transportation from the drain region and the potential heat generation. As such, this structure achieves the first step toward phonon transport management in the same electron transportation direction of planar-type MOSFETs and represents a promising solution to heat generation for advanced CMOS devices.

Plasma nanotechnology is widely used for nanoscale etching, dopant implantation and thin-film deposition for state-of-the-art semiconductor devices. Such a plasma nanotechnology has another interesting aspect of synthesizing nanoparticles, in a controlled manner of atomic composition, structure and those size. Here, we present the polymerization and growth of silicon nanoparticles from a molecular level to 10 nm-particles in hydrogen diluted silane plasmas. The polymerization and growth are experimentally studied using various plasma diagnostic tools. The results indicate that nanoparticles are rapidly formed via gas-phase reactions in a low-density plasma comprising high-energy electrons. The growth kinetics and the modification of plasma properties are discussed in terms of gas-phase reactions, charging and coagulation of nanoparticles.

This paper presents the transient analysis of the equivalent single conductor (ESC) model of hybrid Cu-CNT on-chip interconnects for nanopackaging using matrix rational approximation (MRA) modeling technique. The analysis of propagation delay and peak crosstalk noise is carried out for single and coupled Cu-CNT interconnect lines at 14 nm and 22 nm technology nodes. It has been observed that the proposed MRA model provides a speed-up factor of 131 compared to the HSPICE. An error of less than 1% confirms the accuracy of the proposed model compared to the SPICE simulations. It is observed that Cu-CNT lines are more immune to the crosstalk due to lesser coupling effects compared to Cu and CNT interconnects. The efficacy, accuracy, and comprehensive analysis using the proposed model ensures immense application possibility of the proposed model in the VLSI design automation tools at the nanopackaging level.

Quantum Computing is a technology, which promises to overcome the drawbacks of conventional CMOS technology for high density and high performance applications. Its potential to revolutionize today's computing world is attracting more and more researchers towards this field. However, due to the involvement of quantum properties, many beginners find it difficult to follow the field. Therefore, in this research note an effort has been made to introduce the various aspects of quantum computing to researchers, quantum engineers and scientists. The historical background and basic concepts necessary to understand quantum computation and information processing have been introduced in a lucid manner. Various physical implementations and potential application areas of quantum computation have also been discussed in this paper. Recent developments in each realization, in the context of the DiVincenzo criteria, including ion traps based quantum computing, superconducting quantum computing, nuclear magnetic resonance (NMR) quantum computing, spintronics and semiconductor based quantum computing have been discussed.

In the paper we propose a reconfigurable graphene-based Spiking Neural Network (SNN) architecture and a training methodology for initial synaptic weight values determination. The proposed graphene-based platform is flexible, comprising a programmable synaptic array which can be configured for different initial synaptic weights and plasticity functionalities and a spiking neuronal array, onto which various neural network structures can be mapped according to the application requirements and constraints. To demonstrate the validity of the synaptic weights training methodology and the suitability of the proposed SNN architecture for practical utilization, we consider character recognition and edge detection applications. In each case, the graphene-based platform is configured as per the application tailored SNN topology and initial state and SPICE simulated to evaluate its reaction to the applied input stimuli. For the first application, a 2-layer SNN is used to perform character recognition for 5 vowels. Our simulation indicates that the graphene-based SNN can achieve comparable recognition accuracy with the one delivered by a functionally equivalent Artificial Neural Network. Further, we reconfigure the architecture for a 3-layer SNN to perform edge detection on 2 grayscale images. SPICE simulation results indicate that the edge extraction results are close agreement with the one produced by classical edge detection operators. Our results suggest the feasibility and flexibility of the proposed approach for various application purposes. Moreover, the utilized graphene-based synapses and neurons operate at low supply voltage, consume low energy per spike, and exhibit small footprints, which are desired properties for largescale energy-efficient implementations.